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IRS2336x(D) Family
Over-Current Protection
The IRS2336xD HVICs are equipped with an ITRIP input pin. This functionality can be used to detect over-current
events in the DC- bus. Once the HVIC detects an over-current event through the ITRIP pin, the outputs are
shutdown, a fault is reported through the FAULT pin, and RCIN is pulled to V SS .
The level of current at which the over-current protection is initiated is determined by the resistor network (i.e., R 0 , R 1 ,
and R 2 ) connected to ITRIP as shown in Figure 14, and the ITRIP threshold (V IT,TH+ ). The circuit designer will need to
determine the maximum allowable level of current in the DC- bus and select R 0 , R 1 , and R 2 such that the voltage at
node V X reaches the over-current threshold (V IT,TH+ ) at that current level.
V IT,TH+ = R 0 I DC- (R 1 /(R 1 +R 2 ))
Figure 14: Programming the over-current protection
For example, a typical value for resistor R 0 could be 50 m . The voltage of the ITRIP pin should not be allowed to
exceed 5 V; if necessary, an external voltage clamp may be used.
Over-Temperature Shutdown Protection
The ITRIP input of the IRS2336xD can also be used to detect over-temperature events in the system and initiate a
shutdown of the HVIC (and power switches) at that time. In order to use this functionality, the circuit designer will
need to design the resistor network as shown in Figure 15 and select the maximum allowable temperature.
This network consists of a thermistor and two standard resistors R 3 and R 4 . As the temperature changes, the
resistance of the thermistor will change; this will result in a change of voltage at node V X . The resistor values should
be selected such the voltage V X should reach the threshold voltage (V IT,TH+ ) of the ITRIP functionality by the time that
the maximum allowable temperature is reached. The voltage of the ITRIP pin should not be allowed to exceed 5 V.
When using both the over-current protection and over-temperature protection with the ITRIP input, OR-ing diodes
(e.g., DL4148) can be used. This network is shown in Figure 16; the OR-ing diodes have been labeled D 1 and D 2 .
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